1 features ? advanced new design ? avanced rugged technology ? rugged gate oxide technology ? very low intrinsic capacitances ? excellent switching characteristics ? unrivalled gate charge: 60nc (typ.) ? extended safe operating area ?lower r ds(on) : 0.06 w (typ.) absolute maximum ratings thermal resistance s y mbol characteristics value units v dss drain-to-source voltage 200 v i d continuous drain current (t c = 25 c) 31 a continuous drain current (t c = 100 c) 20 i dm drain current-pulsed ? 124 v v gs gate-to-source voltage 30 j e as single pulsed avalanche energy - 640 mj i ar avalanche current ? 31 a e ar repetitive avalanche energy ? 18 mj dv/dt peak diode recovery dv/dt ? 5.5 v/ns p d total power dissipation (t c = 25 c) linear derating factor 180 1.43 w w/ c t j , t stg operating junction and storage temperature range - 55 to +150 c t l maximum lead temp. for soldering purposes, 1/8 from case for 5-seconds 300 symbol characteristics typ. max. units r q jc junction-to-case - 0.7 c/w r q cs case-to-sink 0.5 - r q ja junction-to-ambient - 62.5 bv dss = 200v r ds(on) = 0.075 w i d = 31a to-220 1. gate 2. drain 3. source 3 2 1 qfet n-channel fqp34n20 ? 1999 fairchild semiconductor corporation rev. b
fqp34n20 qfet n-channel 2 electrical characteristics (t c = 25 c unless otherwise specified) source-drain diode ratings and characteristics notes: ? repetitive ratin g : pulse width limited by maximum junction temperature - l=1mh, i as =31a, v dd =50v, r g =25 w , startin g t j =25 c ? i sd 34a, di/dt 300 m s, v dd bv dss , startin g t j =25 c pulse test: pulse width 300 m s, duty cycle 2% essentially independent of operatin g temperature symbol characteristics min. typ. max. units test conditions bv dss drain-source breakdown votlage 200 -- vv gs =0v, i d =250 m a d bv/ d t j breskdown voltage temp. coeff. - 0.2 - v/ ci d =250 m a, see fig 7 v gs(th) gate threshold voltage 3.0 - 5.0 v v ds =5v, i d =250 m a i gss gate-source leakage, forward -- 100 na v gs =30v gate-source leakage, reverse --- 100 v gs = - 30v i dss drain-to-source leakage current -- 1 m a v ds =200v -- 10 v ds =160v, t c =125 c r ds(on) static drain-source on-state resistance - 0.06 0.75 w v gs =10v, i d =16a g fs forward transconductance - 25 - sv ds =40v, i d =16a c iss input capacitance - 2400 3100 pf v gs =0v, v ds =25v f=1mhz see fig 5 c oss output capacitance - 430 560 c rss reverse transfer capacitance - 55 70 t d(on) turn-on delay time - 40 90 ns v dd =100v, i d =34a r g =50 w see fig 13 t r rise time - 280 570 t d(off) turn-off delay time - 125 260 t f fall time - 115 240 q g total gate charge - 60 78 nc v ds =160v, v gs =10v i d =34a see fig 6 & fig 12 q gs gate-source charge - 17 - q gd gate-drain (miller) charge - 27 - symbol characteristics min. typ. max. units test conditions i s continuous source current -- 31 a integral reverse pn-diode in the mosfet i sm pulsed-source current ? -- 124 v sd diode forward voltage -- 1.5 v t j =25 c, i s =31a, v gs =0v q rr reverse resovery time - 150 - ns t j =25 c, i f =34a, v dd =160v di f /dt=100a/ m s reverse resovery charge - 0.95 -m c
3 fig 1. output characteristics fig 2. transfer characteristics fig 6. gate charge vs. gate-source voltage fig 5. capacitance vs. drain-source voltage fig 4. source-drain diode forward voltage fig 3. on-resistance vs. drain current 246810 10 -1 10 0 10 1 10 2 ?? note 1. v ds = 40v 2. 250s pulse test -55? 150? 25? i d , drain current [a] v gs , gate-source voltage [v] 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 10 -1 10 0 10 1 10 2 25? 150? ?? not e : 1. v gs = 0v 2. 250s pulse test i dr , reverse drain current [a] v sd , source-drain voltage [v] 10 -1 10 0 10 1 10 0 10 1 10 2 v gs top : 15 v 10 v 8.0 v 7.0 v 6.5 v 6.0 v bottom : 5.5 v ?? note : 1. 250s pulse test 2. t c = 25? i d , drain current [a] v ds , drain-source voltage [v] 10 -1 10 0 10 1 0 1000 2000 3000 4000 5000 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd ?? note ; 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitances [pf] v ds , drain-source voltage [v] 0 10203040506070 0 2 4 6 8 10 12 v ds = 100v v ds = 40v v ds = 160v ?? note : i d = 34 a v gs , gate-source voltage [v] q g , total gate charge [nc] 0 20 40 60 80 100 120 140 0.00 0.05 0.10 0.15 0.20 0.25 0.30 ?? note : t j = 25? v gs = 20v v gs = 10v r ds(on) , [ w ] drain-source on-resistance i d , drain current [a] qfet n-channel fqp34n20
fqp34n20 qfet n-channel 4 10 0 10 1 10 2 10 -1 10 0 10 1 10 2 dc 10 ms 1 ms 100 m s operation in this area is limited by r ds(on) ?? notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source volta g e [v] p dm t 1 t 2 fig 7. breakdown voltage vs. temperature fig 8. on-resistance vs. temperature fig 11. thermal response fig 10. max. drain current vs. case temperature fig 9. max. safe operating area p dm t 1 t 2 -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 ?? not e : 1. v gs = 0 v 2. i d = 250 a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 ?? note : 1. v gs = 10 v 2. i d = 17 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 ?? n o te s : 1 . z jc (t) = 0.7 ?/w max. 2. duty factor, d=t 1 /t 2 3 . t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), therm al response t 1 , square w ave pulse duration [sec] 25 50 75 100 125 150 0 5 10 15 20 25 30 35 i d , drain current [a] t c , case temperature [?] [ c]
5 fig 12. gate charge test circuit & waveform fig 13. resistive switching test circuit & waveforms fig 14. unclamped inductive switching test circuit & waveforms e as =l l i as 2 ---- 2 1 -------------------- bv dss -- v dd bv dss v in v ds 10% 90% t d(on) t r t on t off t d(off) t f charge v gs 10v q g q gs q gd v dd v ds bv dss t p v dd i as v ds (t) i d (t) time v dd ( 0.5 rated v ds ) 10v v ds r l dut r g 3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut 10v dut r g l i d qfet n-channel fqp34n20
fqp34n20 qfet n-channel 6 fig 15. peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same t y pe as dut v gs ? dv/dt controlled by r g ? i s controlled by pulse period v dd l i s 10v v gs ( driver ) i s ( dut ) v ds ( dut ) v dd body diode forward volta g e drop v f i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period --------------------------
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